[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"$f2kOi2v5KeUIaktif-sem4Uqk9JUPwV5AevsNioOE49A":3},{"answer":4,"createTime":5,"id":6,"options":7,"origin":12,"question":19,"related":20,"source":30,"type":31},[],"2023-11-25 14:26:22",108429662,[8,9,10,11],"编码器","串入并出移位寄存器","并入串出移位寄存器","译码器",{"count":13,"courseId":14,"courseImg":15,"courseName":16,"workId":17,"workName":18},10,"c322e924b3223ffd740ed5db1a12b050","https:\u002F\u002Ftihai-oss-cloud.itihey.com\u002Fimg\u002Fd9eaef8ea2690faba12fec4caf2d0cf6.jpg","EDA","e242f800676449478a306e132eb6576e","实验七测验","芯片74ls595的逻辑功能主要是()",[21,32,41,44,54,63,72,81,90,99],{"answer":22,"createTime":5,"id":23,"options":24,"question":29,"source":30,"type":31},[],108429651,[25,26,27,28],"远大于","大于","左移","右移","verilog中的符号&quot;&quot;&gt;&gt;&quot;&quot;表示()","v1",0,{"answer":33,"createTime":5,"id":34,"options":35,"question":40,"source":30,"type":31},[],108429655,[36,37,38,39],"非","与","或","异或","在verilog中&quot; &amp;&quot;表示逻辑操作中的()",{"answer":42,"createTime":5,"id":6,"options":43,"question":19,"source":30,"type":31},[],[8,9,10,11],{"answer":45,"createTime":46,"id":47,"options":48,"question":53,"source":30,"type":31},[],"2023-11-25 14:26:23",108429664,[49,50,51,52],"16*16","8*8","4*4","2*2","本实验采用的点阵类型为()",{"answer":55,"createTime":46,"id":56,"options":57,"question":62,"source":30,"type":31},[],108429666,[58,59,60,61],"File\\New\\Verilog Hdl file","File\\New\\VHdl file","File\\New\\Block Diagram(Schematic file)","File\\New Project","在quartus软件中,新建原理图的操作命令为()",{"answer":64,"createTime":46,"id":65,"options":66,"question":71,"source":30,"type":31},[],108429668,[67,68,69,70],"addr[3:0]","addr[3.0]","addr[3..0]","addr[3...0]","本实验原理图中地址总线的正确书写方式是()",{"answer":73,"createTime":46,"id":74,"options":75,"question":80,"source":30,"type":31},[],108429670,[76,77,78,79],"50M\u002F200","50M\u002F400","50M*200","50M*400","本实验中,div模块的作用是分频,输出clk1的频率为()Hz",{"answer":82,"createTime":46,"id":83,"options":84,"question":89,"source":30,"type":31},[],108429674,[85,86,87,88],"为试验箱上的74ls138提供地址译码信号","为试验箱上的74ls595提供地址译码信号","为试验箱上的74ls138提供移位数据信号","为试验箱上的74ls595提供移位数据信号","原理图中的输出信号DS的作用是()",{"answer":91,"createTime":46,"id":92,"options":93,"question":98,"source":30,"type":31},[],108429676,[94,95,96,97],"74ls595","zf_rom","div","74ls138","实验箱上的点阵用来显示字符,它的行驱动信号是由()来提供的",{"answer":100,"createTime":46,"id":101,"options":102,"question":107,"source":30,"type":31},[],108429678,[103,104,105,106],"产生行地址驱动信号","产生列地址驱动信号","产生移位数据信号","产生时钟信号","原理图中,信号A[3..0]的作用是()"]