[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"$fHmUjjAEvTQmviV2jc6jCDS_ZyXvlFitFRbutCdFFZB8":3},{"id":4,"source":5,"question":6,"options":7,"answer":12,"related":13,"type":24,"origin":111,"createTime":26},219049721,"v1","分析一个时序电路,就是要找出给定时序电路的逻辑功能.具体地说,就是要求找出电路的状态和输出的状态在()和时钟信号作用下的变化规律",[8,9,10,11],"激励信号","输入变量","输出变量","反馈变量",[],[14,27,37,41,51,61,71,81,91,101],{"id":15,"source":5,"question":16,"options":17,"answer":22,"related":23,"type":24,"origin":25,"createTime":26},219049719,"余3码10001000对应的2421码为()",[18,19,20,21],"1010101","10000101","10111011","11101011",[],[],0,null,"2025-09-30T15:00:59+08:00",{"id":28,"source":5,"question":29,"options":30,"answer":35,"related":36,"type":24,"origin":25,"createTime":26},219049720,"理想二极管的反向电流()",[31,32,33,34],"为0","与温度有关","与光照有关","与制造工艺有关",[],[],{"id":4,"source":5,"question":6,"options":38,"answer":39,"related":40,"type":24,"origin":25,"createTime":26},[8,9,10,11],[],[],{"id":42,"source":5,"question":43,"options":44,"answer":49,"related":50,"type":24,"origin":25,"createTime":26},219049722,"构成一个全加器应由两个半加器和一个()",[45,46,47,48],"与非门","与门","或门","或非门",[],[],{"id":52,"source":5,"question":53,"options":54,"answer":59,"related":60,"type":24,"origin":25,"createTime":26},219049723,"二进制译码器是指()",[55,56,57,58],"将二进制代码转换成2的N次方个控制信息中特定的一个","将某个特定的控制信息转换成二进制数","将二进制代码转换成0~9个数字","具有以上三种功能",[],[],{"id":62,"source":5,"question":63,"options":64,"answer":69,"related":70,"type":24,"origin":25,"createTime":26},219049724,"由N沟道和P沟道增强型MOS管并联互补组成CMOS传输门,其控制电压分别加在()",[65,66,67,68],"栅极\u002F栅极","源极\u002F栅极","漏极\u002F栅极","源极、源极",[],[],{"id":72,"source":5,"question":73,"options":74,"answer":79,"related":80,"type":24,"origin":25,"createTime":26},219049725,"当移位寄存器的时钟周期为T时,经过16级触发器后,移位寄存器的输出数据与输入数据有()",[75,76,77,78],"16倍的放大","16个周期T的延迟","输出了16位数据","无变化",[],[],{"id":82,"source":5,"question":83,"options":84,"answer":89,"related":90,"type":24,"origin":25,"createTime":26},219049726,"时序逻辑电路在逻辑功能上的特点是任意时刻的输出不仅取决于当时的输入信号,而且还取决于电路()的状态",[85,86,87,88],"普通","常见","原来","基础",[],[],{"id":92,"source":5,"question":93,"options":94,"answer":99,"related":100,"type":24,"origin":25,"createTime":26},219049727,"FPGA是()",[95,96,97,98],"接口电路","复杂模拟电路","逻辑门电路","现场可编程门阵列",[],[],{"id":102,"source":5,"question":103,"options":104,"answer":109,"related":110,"type":24,"origin":25,"createTime":26},219049728,"同步时序电路和异步时序电路比较,其差异在于后者()",[105,106,107,108],"没有触发器","没有统一的时钟脉冲控制","没有稳定状态","输出只与内部状态有关",[],[],{"courseName":112,"courseImg":113,"workName":114,"workId":115,"count":116,"courseId":117},"默认课程","https:\u002F\u002Ftihai-oss-cloud.itihey.com\u002Fimg\u002F03a579384a6dc297c89809b582fcc767.png","数字电路与数字逻辑 414555412B","exam_167262306",29,"53e1d2ef4961cca8eea3e23969ad2cb9"]