[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"$f8el9FndSWVNluwUXtdLNgRzgGYckNNW0n7zXMMw5vNo":3},{"answer":4,"createTime":5,"id":6,"options":7,"origin":12,"question":19,"related":20,"source":30,"type":31},[],"2025-12-10 12:48:47",258418701,[8,9,10,11],"异步","同步","同步、异步都可以","无",{"count":13,"courseId":14,"courseImg":15,"courseName":16,"workId":17,"workName":18},50,"53e1d2ef4961cca8eea3e23969ad2cb9","https:\u002F\u002Ftihai-oss-cloud.itihey.com\u002Fimg\u002F03a579384a6dc297c89809b582fcc767.png","默认课程","work_48918677","数字电子技术第六次作业","集成计数器 74LS161 的预置数方式是",[21,32,41,50,59,68,77,86,95,98],{"answer":22,"createTime":5,"id":23,"options":24,"question":29,"source":30,"type":31},[],258418688,[25,26,27,28],"输出仅取决于当前输入","输出取决于当前输入和电路原状态","输出仅取决于电路原状态","输出与输入和电路原状态都无关","时序逻辑电路的主要特点是什么","v1",0,{"answer":33,"createTime":5,"id":34,"options":35,"question":40,"source":30,"type":31},[],258418689,[36,37,38,39],"锁存器","触发器","计数器","译码器","下列哪种逻辑器件的输出状态变化取决于时钟脉冲",{"answer":42,"createTime":5,"id":43,"options":44,"question":49,"source":30,"type":31},[],258418690,[45,46,47,48],"低电平期间","高电平期间","上升沿时刻","下降沿时刻","主从 RS 触发器在时钟脉冲 CP 的哪个阶段根据输入信号改变状态",{"answer":51,"createTime":5,"id":52,"options":53,"question":58,"source":30,"type":31},[],258418691,[54,55,56,57],"随之消失","恢复原态","发生翻转","保持现态","触发器在触发脉冲消失后,输出状态将如何",{"answer":60,"createTime":5,"id":61,"options":62,"question":67,"source":30,"type":31},[],258418692,[63,64,65,66],"禁止状态","置 0","置 1","翻转","在 RS 触发器中,如果 R 和 S 都为 0,触发器将如何",{"answer":69,"createTime":5,"id":70,"options":71,"question":76,"source":30,"type":31},[],258418695,[72,73,74,75],"J=K=0","J=K=1","R 和 S 同时为 1","D=Q","触发器在何种情况下可能会进入不稳定状态",{"answer":78,"createTime":5,"id":79,"options":80,"question":85,"source":30,"type":31},[],258418697,[81,82,83,84],"1 个","2 个","3 个","4 个","74LS112 内部包含多少个 JK 触发器",{"answer":87,"createTime":5,"id":88,"options":89,"question":94,"source":30,"type":31},[],258418699,[90,91,92,93],"输出不随输入变化","输出随输入变化","输出变为 0","输出变为 1","触发器输出状态的&quot;保持&quot;是指",{"answer":96,"createTime":5,"id":6,"options":97,"question":19,"source":30,"type":31},[],[8,9,10,11],{"answer":99,"createTime":5,"id":100,"options":101,"question":106,"source":30,"type":31},[],258418704,[102,103,104,105],"CPU=1,CPD=1","CPU=1,CPD=CP","CPU=CP,CPD=1","CPU=CP,CPD=0","当集成计数器 74LS192 构成加法计数器时,CPD 和 CPU 的接法应是"]