[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"$fR_2f60tESHl2y5DyNFcdkS6rAgxPg3oeeaWrJevLObM":3},{"id":4,"source":5,"question":6,"options":7,"answer":8,"related":9,"type":16,"origin":71,"createTime":18},93947829,"v1","参见图B12.1的数据通路,画出数据指令\"STA,R1,(R2)\"的指令周期流程图,器含义将寄存器R1的内容传送至(R2)位地址的贮存单元中.标出各微操作信号序列.\u003Cimg src=\"\u002Fexam-ans\u002Fjs\u002Feditor20150812\u002Fdialogs\u002Fattachment_new\u002FfileTypeImages\u002Ficon_png.png\">{232F0G}{PR_IBONRYK~B9R.png",[],[],[10,19,25,29,35,41,47,53,59,65],{"id":11,"source":5,"question":12,"options":13,"answer":14,"related":15,"type":16,"origin":17,"createTime":18},93947827,"用16K × 1位的DRAM芯片构成64K × 8位的存储器.要求:(1)画出该存储器组成的逻辑框图.(2)设存储器读 \u002F 写周期均为0.5μs,CPU在1μs内至少要访存一次.试问采用哪种刷新方式比较合理?两次刷新的最大时间间隔是多少?对全部存贮单元刷新一遍,所需实际刷新时间是多少",[],[],[],8,null,"2023-07-09T10:39:21+08:00",{"id":20,"source":5,"question":21,"options":22,"answer":23,"related":24,"type":16,"origin":17,"createTime":18},93947828,"某机器采用一地址格式的指令系统,允许直接和间接寻址.机器配置有如下硬件:ACC,MAR,MDR,PC,X,MQ,IR以及变址寄存器RX和基址寄存器RB,均为16位.(1)若采用单字长指令,功能完成105种操作,则指令可直接寻址的范围是多少?一次间址的寻址范围是多少?画出其指令格式并说明各字段的含义.(2)若采用双字长指令,操作码位数及寻址方式不变,则指令可直接寻址的范围又是多少?画出其指令格式并说明各字段的含义.(3)若存储字长不变,可采用什么方法访问容量为8MB的主存?需增设哪些硬件",[],[],[],{"id":4,"source":5,"question":6,"options":26,"answer":27,"related":28,"type":16,"origin":17,"createTime":18},[],[],[],{"id":30,"source":5,"question":31,"options":32,"answer":33,"related":34,"type":16,"origin":17,"createTime":18},93947830,"某微程序控制器中,采用水平型直接控制(编码)方式微指令格式,后继微指令地址由微指令的下地址字段给出.已知机器共有22个微命令、5个互斥的可判定的外部条件,控制存储器的容量为128×32位.(1)设计微指令格式.(2)画出该控制单元结构框图",[],[],[],{"id":36,"source":5,"question":37,"options":38,"answer":39,"related":40,"type":16,"origin":17,"createTime":18},93947831,"设某机主存容量为4MB,Cache容量为16KB,每字块有8个字,每字32位,按字节为单位进行编址,设计一个四路组相联映射(即Cache每组内共有4个字块)的Cache组织.(1)画出主存地址字段中各段的位数.(2)设Cache的初态为空,CPU依次从主存第0,1,2,…,89号单元读出90个字(主存一次读出一个字),并重复按此次序读8次,问命中率是多少",[],[],[],{"id":42,"source":5,"question":43,"options":44,"answer":45,"related":46,"type":16,"origin":17,"createTime":18},93947832,"Cache做在CPU芯片内有什么好处?将指令Cache和数据Cache分开又有什么好处",[],[],[],{"id":48,"source":5,"question":49,"options":50,"answer":51,"related":52,"type":16,"origin":17,"createTime":18},93947833,"某计算机字长16位,主存容量为64K字,采用单字长单地址指令,共有64条指令,试采用四种寻址方式(立即、直接、基值、相对)设计指令格式,并写出这四种寻址方式的有效地址计算方法",[],[],[],{"id":54,"source":5,"question":55,"options":56,"answer":57,"related":58,"type":16,"origin":17,"createTime":18},93947834,".设某机有4个中断源A、B、C、D,其硬件排队优先次序为A>B>C>D,现要求将中断处理次序改为D>A>C>B.(1)写出每个中断源对应的屏蔽字(2)按图时间轴给出的四个中断源的请求时刻,画出CPU执行程序的轨迹.设每个中断源的中断服务程序时间均为20us.\u003Cimg src=\"\u002Fexam-ans\u002Fjs\u002Feditor20150812\u002Fdialogs\u002Fattachment_new\u002FfileTypeImages\u002Ficon_png.png\">8GEBJQUXUYGESFFY4R5B0U8.png",[],[],[],{"id":60,"source":5,"question":61,"options":62,"answer":63,"related":64,"type":16,"origin":17,"createTime":18},93947835,"设主存容量为1MB,采用直接映射方式的Cache容量为16KB,块长为4个字,每字32位,按字节为单位进行编址.试问主存地址为ABCDEH的存储单元在Cache中的什么位置",[],[],[],{"id":66,"source":5,"question":67,"options":68,"answer":69,"related":70,"type":16,"origin":17,"createTime":18},93947836,"某机存储器容量为64K*16位,该机访存指令格式如下\u003Cimg src=\"\u002Fexam-ans\u002Fjs\u002Feditor20150812\u002Fdialogs\u002Fattachment_new\u002FfileTypeImages\u002Ficon_png.png\">5_(2_{BAAR3Z2AA6D4HY0D6.png其中M为寻址模式:0为直接寻址,1为基址寻址,2为相对寻址,3为立即寻址;I为间址特征(I=1 间址);X为变址特征(X=1变址),设PC为程序计数器,RX为变址寄存器,RB为基址寄存器,问(1)该指令能定义多少种操作?(2)立即寻址操作数的范围?(3)写出每种寻址方式计算有效地址的表达式(4)设基址寄存器为14位,在非变址直接基址寻址时,指令的寻址范围是多少?(5)间接寻址时,寻址范围是多少?若允许多重寻址,寻址范围又是多少",[],[],[],{"courseName":72,"courseImg":73,"workName":74,"workId":75,"count":76,"courseId":77},"计算机组成原理","https:\u002F\u002Ftihai-oss-cloud.itihey.com\u002Fimg\u002Ffb4e0e6a5574c0a2bea5a3691ff957f7.jpg","3","exam_100423729",37,"20caa21863d5479e1298147af8985e37"]