[{"data":1,"prerenderedAt":-1},["ShallowReactive",2],{"$f7dgs9eAJ-Ck6s7uyHQxDCVCbajeen5B-v_NukHVKsJI":3},{"answer":4,"createTime":5,"id":6,"options":7,"origin":12,"question":16,"related":17,"source":27,"type":28},[],"2023-10-14 09:16:53",99768502,[8,9,10,11],"SDRAM","FLASH","SRAM","ROM",{"courseId":13,"courseImg":14,"courseName":15},"164155da48ba12011e02cb79473a1a56","https:\u002F\u002Ftihai-oss-cloud.itihey.com\u002Fimg\u002Ff48231839b7b50ed5d9d54ee2aea569a.png","计算机组成原理-面向2021级计算机","下列存储器中,在工作期间需要周期性刷新的是( )",[18,29,38,47,57,67,76,85,94,97],{"answer":19,"createTime":5,"id":20,"options":21,"question":26,"source":27,"type":28},[],99768480,[22,23,24,25],"仅②、③和④","仅①和②","仅①、②和④","仅②和③","下列有关RAM和ROM的叙述中,正确的是( ).①RAM是易失性存储器,ROM是非易失性存储器;②RAM和ROM都采用随机存取方式进行信息访问;③RAM和ROM都可用作Cache;④RAM和ROM都需要进行刷新","v1",1,{"answer":30,"createTime":5,"id":31,"options":32,"question":37,"source":27,"type":28},[],99768483,[33,34,35,36],"双极型存储单元","动态MOS四管存储单元","动态MOS型单管单元","静态MOS型六管存储单元","下列各种存储单元的电路中,读数据时属于破坏性读出的存储是( )",{"answer":39,"createTime":5,"id":40,"options":41,"question":46,"source":27,"type":28},[],99768486,[42,43,44,45],"32GB\u002Fs","10.66GB\u002Fs","64GB\u002Fs","96GB\u002Fs","假定一台计算机采用3通道存储总线,配套的内存条型号为DDR3-1333,即内存条所接插的存储器总线的工作频率为1333MHZ,总宽度为64位,则存储器总线的总带宽大约是( )",{"answer":48,"createTime":49,"id":50,"options":51,"question":56,"source":27,"type":28},[],"2023-10-14 09:16:54",99768490,[52,53,54,55],"高地址端的RAM芯片组,片选逻辑是:A15非·A14非·A13·A12·A11非","低地址端的RAM芯片组,片选逻辑是:A15非·A14非·A13非·A12非·A11非","低地址端EPROM芯片,片选逻辑是:A15非·A14非·A13非·A12","高地址端EPROM芯片,片选逻辑是:A15非·A14非·A13非·A12非","某半导体14KB,按字节编址,其中0000H-1FFFH为ROM区,2000H-37FFH为RAM区,地址总线A15-A0(低),双向数据总线D7-D0(低),读写控制线R\u002FW.可选用的存储芯片有EPROM(4KB\u002F片)和RAM(2K×4位\u002F片) .对各组芯片的片选逻辑表达式描述,正确的是( )",{"answer":58,"createTime":59,"id":60,"options":61,"question":66,"source":27,"type":28},[],"2023-10-13 20:39:39",99768492,[62,63,64,65],"移动硬盘是一种半导体存储器,能保存大量的数据","硬盘属于磁表面存储器,能长期保存数据,读数据的操作是非破坏性读出","动态存储器依靠双稳态电路来存储信息,需要定时刷新","静态存储器依靠电容来存储信息,不需要刷新,需要电源供电才能保存信息","下列关于存储器的各项叙述,正确的是( )",{"answer":68,"createTime":5,"id":69,"options":70,"question":75,"source":27,"type":28},[],99768494,[71,72,73,74],"EPROM芯片的地址线12位(A11-A0),RAM芯片地址线12位(A11-A0)","EPROM芯片的地址线13位(A12-A0),RAM芯片地址线12位(A11-A0)","EPROM芯片的地址线12位(A11-A0),RAM芯片地址线11位(A10-A0)","EPROM芯片的地址线13位(A12-A0),RAM芯片地址线11位(A10-A0)","某半导体14KB,按字节编址,其中0000H-1FFFH为ROM区,2000H-37FFH为RAM区,地址总线A15-A0(低),双向数据总线D7-D0(低),读写控制线R\u002FW.可选用的存储芯片有EPROM(4kB\u002F片)和RAM(2K×4位\u002F片) .下列的芯片地址线分配方案中, 描述正确的是( )",{"answer":77,"createTime":5,"id":78,"options":79,"question":84,"source":27,"type":28},[],99768497,[80,81,82,83],"Cache","外存","内存","寄存器堆","下列不属于计算机存储体系的是( )",{"answer":86,"createTime":59,"id":87,"options":88,"question":93,"source":27,"type":28},[],99768500,[89,90,91,92],"随机访问方式","直接存取方式","突发存取方式","顺序存取方式","对硬盘的读写操作,采用的存储器存取方式是( )",{"answer":95,"createTime":5,"id":6,"options":96,"question":16,"source":27,"type":28},[],[8,9,10,11],{"answer":98,"createTime":5,"id":99,"options":100,"question":105,"source":27,"type":28},[],99768505,[101,102,103,104],"1、2048","64、32","32、64","2048、1","假定DRAM芯片中存储阵列的行数为r、列数为c,对于一个2K*1位的DRAM芯片,为保证其地址引脚数量最少,并尽量减少刷新开销,则r,c的取值分别是( )"]